Xilinx Versal NET

• The TF-A Tests on Xilinx Versal NET platform runs from DDR.

• Logs are available only on console and not saved in memory(No NVM support).

• Versal NET Platform uses TTC Timer

Build Command

For individual tests/test suite:

For Versal NET Specific tests (includes AMD-Xilinx Tests cases + Standard Test Suite)

Execution on Target

• The TF-A Tests uses the memory location of U-boot.

• To package the tftf.elf in BOOT.BIN, the u-boot entry in bootgen.bif needs to be replaced with following

• The BOOT.BIN with TF-A Tests can now be used to run on the target.

• The TF-A Tests will be executed after TF-A and the tests report will be available on the console.